Olivier Temam
INRIA Saclay
Batiment N
Parc Club Universite
rue Jean Rostand
91893 Orsay Cedex
France
Tel: +33 1 72 92 59 52
Email: olivier.temam@inria.fr
Directeur de Recherche (~ Senior Research Fellow) at INRIA
Leader of the INRIA ALCHEMY Group
Adjunct Professor at Ecole Polytechnique
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My primary research interests are in alternative computing systems.
Summary. Moore's law is not over yet, but we start to feel the pressure (power, which led to homogeneous multi-cores and may now lead to heterogeneous multi-cores, defects at design time or during chip lifetime). While processors and multi-cores should be pushed and optimized as much as possible, the technology issues have become severe enough that it also makes sense to start seeking alternative approaches.
Among several possible options, currently, I am looking at hardware neural networks for their power efficiency and especially for their defects tolerance capabilities. While hyped in the 1980s and 1990s, neural networks fell out of favor. However, lately, a remarkable convergence of trends in several domains of science are making hardware neural networks particularly attractive again.
My own research work can be decomposed into a 'roadmap' for bringing hardware neural networks to heterogeneous general-purpose or special-purpose computing systems, in the form of accelerators. On the hardware side, the goal is to progressively increase the network size (in neurons/synapses) by improving its density. On the software side, the goal is to create an appropriate programming environment for heterogeneous systems and to demonstrate the application scope of neural networks.
You can find more details in the slides of the keynote at ISCA 2010, with a rough written summary of what I said on each slide.
In addition to the aforementioned research work, I am working on the following, and more 'traditional', computing systems topics:
- Multi-Purpose accelerators. An automated design approach for generating and merging ASICs, which can boost the flexibility of ASIC accelerators while preserving their energy and programming assets.
- Design automation. We develop techniques for the automatic exploration of the hardware design space (using modular simulation, see ArchExplorer), and the compiler design space (see KDataSets).
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No teaching is required at INRIA, but I enjoy teaching the Computer Architecture course at Ecole Polytechnique.
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